The present invention relates to signal processing for imaging arrays and, more particularly, to imaging edge enhancement with background noise suppression in a CMOS image sensor.
Integrated circuit technology has revolutionized various fields including computers, control systems, telecommunications, and imaging. In the field of imaging, the charge couple device (CCD) sensor has made possible the manufacture of relatively low-cost and small hand-held video cameras. An alternative low-cost technology to CCD integrated circuits is the metal oxide semiconductor (MOS) integrated circuit. Using MOS technology, the signal processing circuitry can be integrated alongside the imaging circuitry, thus allowing for a single integrated chip to form a complete standalone imaging device. To reduce the costs of imaging systems, there has been increasing pressure to reduce the number of chips and other components while still maintaining high image quality.
An example of a single chip used for CTV image processing is detailed in xe2x80x9cA New Single Chip LSI for an NTSC CTV Signal Processing,xe2x80x9d by Yoshimochi et al., IEEE, Transactions on Consumer Electronics, Volume 35, August 1989, p. 297. As described for the Yoshimochi et al. device, the video signal processing stage shown in FIG. 1 of that reference consists of an input clamp circuit (CLAMP), a black level stretcher (BLACK DET), a DC restoration circuit (DC RESTORATION), a switchable 3.58 MHz chroma trap (3.58 TRAP), a video delay line circuit to compensate the chroma signal delay time (DELAY LINE), a delay line type picture sharpness control (DL CONTOUR), a contrast control circuit (CONTRAST) and a brightness control circuit (CLAMP BRIGHT).
The delay line type picture sharpness control circuit (DL CONTOUR) of the Yoshimochi et al. device is shown in FIG. 4 of that reference, which has been reproduced as FIG. 1 herein. As illustrated in FIG. 1, the video input is received at a line A, which is coupled to the input of a delay line 10, and is also coupled to the inverting input of an amplifier 14. The output of delay line 10 is coupled to a line B, that is coupled to the input of a delay line 12, and is coupled to the non-inverting inputs of amplifiers 14 and 16 and is coupled to a summer 26. The output of delay line 12 is coupled to a line C, that is coupled to the inverting input of the amplifier 16. The output of the amplifier 14 is coupled to a line D that is coupled through a limiter 18 to a summer 22. The output of the amplifier 16 is coupled to a line E that is coupled through a limiter 20 to a summer 22. The output of summer 22 is coupled to the input of a sharpness control circuit 24. The output of sharpness control circuit 24 is coupled to a line F that is coupled to summer 26. The output of summer 26 is coupled to a line G, which provides the video output of the system. The Yoshimochi et al. reference states that this delay line type picture sharpness control circuit achieves a ringingless horizontal contour enhancement when compared with a conventional second order differential type.
The operation of the circuit of FIG. 1 is illustrated in the timing diagrams of FIGS. 2A-2G. FIGS. 2A, 2B, and 2C show the signals on the lines A, B, and C, respectively. As illustrated above, the signal on line B is produced by delaying the signal on line A for approximately one time period (t=approximately 160 ns) through the delay line 10. Then the signal on line C is produced by delaying the signal on line B for approximately one more time period through the delay line 12.
FIG. 2D illustrates the output D of amplifier 14 that subtracts the signal shown in FIG. 2A from the signal shown in FIG. 2B. FIG. 2E illustrates the output E of amplifier 16, which subtracts the signal shown in FIG. 2C from the signal shown in FIG. 2B. FIG. 2F shows the sum of the outputs D and E from the limiters 18 and 20, once they have been added through the summer 22, and then adjusted by the sharpness control 24 to become the signal F. FIG. 2G shows the output G of summer 26, which adds the signals shown in FIGS. 2B and 2F.
The overall purpose of the circuit of FIG. 1 and its operations illustrated in FIG. 2 can be described with reference to the timing diagrams of FIG. 3. In general, the purpose of the circuit of FIG. 1 is to enhance the transitions in the video signals that occur at the edge of an image. At the edge of an image, the signals produced by the pixels of the sensor array may have a sharp contrast from one pixel to the next, as the image is scanned out. In other words, at the edge of an image, one pixel may be receiving a signal at a low dark level, while the next pixel is receiving a signal at a high light level. FIG. 3A illustrates a transition at time t1 representing a transition from a pixel receiving a low dark signal to a pixel receiving a high light signal. The signal shown in FIG. 3A is for an ideal case where the image processing circuitry reacts instantaneously. However, in actual signal processing circuitry, the various components may contribute to a loss in resolution at higher spatial frequency, such that the transition that is begun at time t1 may not be completed until time t2. A timing diagram illustrating this effect is shown in FIG. 3B. To compensate for this phenomena, one method is to enhance the edge of the image by adding an extra signal at the transitions to attempt to make the processed signal appear more like the signal shown in FIG. 3A. The signal that results from enhancing the edge of the signal is illustrated in FIG. 3C. It can be seen that the signal illustrated in FIG. 3C is comparable to the first half of the signal illustrated in FIG. 2G. Thus, the type of transition enhancement shown in FIG. 3C is what the circuit of FIG. 1 is attempting to produce.
One of the disadvantages of the circuit of FIG. 1 is that, in addition to producing symmetrical overshoots around transitions in the picture, it also amplifies the noise simultaneously. In other words, the same process that enhances the edges for desired signal transitions also enhances undesirable noise transitions.
The present invention is directed to a method and apparatus that overcomes the foregoing and other problems in the prior art. More specifically, the present invention is directed to a method and apparatus for imaging enhancement with background noise suppression.
A method and apparatus for image edge enhancement with background noise suppression is disclosed. By including biasing circuitry in the signal path, the symmetrical overshoots around transitions in the picture may be maintained, while at the same time smaller transitions in the signals such as those representing signal noise may be suppressed. In this manner, background noise is suppressed, while the edge of the image is enhanced. In particular, the biasing circuitry may be placed in the signal path between the output of the first delay line and the noninverting inputs of the two signal amplifiers.